Two categories of microprocessor have dominated computing over the past 18 years, performance processors and low power processors. These are now being joined by a third category of microprocessors, minimal cost processors. This emergence of minimal cost processors, led by RISC-V and MIPS Open, will replenish the dwindling supply of system design engineers.
The dominance of the Intel architecture eliminated a generation or two of system design engineers. Years ago there was a cornucopia of processor architectures used in different computing segments, then Intel’s critical mass made standardisation viable across a number of different markets.This move to x86 everywhere made economic sense for many companies but the result was a homogenisation of design.
Where designs once were expensive and bespoke processors and boards became a commodity. Intel used economies of scale to extract significant gross profit from those commodities while their fabrication prowess ensured competitors could never execute fast enough to challenge them. When Intel stumbled a competitor rose, when Intel returned to superior execution the competitor fell.
As a host of processor competitors withered and died there was neither space nor need for people working on things that were substantially different to x86. Very quietly the PC and Server wars ended. Across desktops, in appliances and in data centres "Pax Intel" reigned.
For a long time AMD and IBM POWER were the only other two providers left standing among a pile of defunct designs and their market share was minimal. It took a new class of device, the smartphone, for ARM to propagate across the world. If you are looking for performance Intel, AMD (And POWER) occupy that category, but a low power category was an opportunity for someone else.
ARM, today's low power champion, is now under threat from a new category that of the "minimal cost" category. Two designs from the distant past have returned and unhappy ARM licensees are interested in what they have to offer.
The first minimal cost design is RISC-V, the fifth version of the original Reduced Instruction Set Computer processor designed at UC Berkeley. The second is MIPS Open, the successor of the Stanford University spin-out processor that powered Silicon Graphics systems and the Nintendo 64.
These two minimal cost processors offer current ARM licensees the choice between hiring their own engineers to create new designs using an open license or not doing any of that and taking a license for immutable core designs from ARM. Increasingly firms are now looking at the cost of licensing from ARM and are instead putting their own design teams together. System design jobs have entered a new era of expansion with companies looking at doing their own bespoke implementations again.
RISC-V has a simple base specification of about 50 or so instructions, in contrast the POWER Instruction Set Architecture I used to keep in a desk drawer runs to three bound books and over 1200 pages. RISC-V’s academic roots are plain to see as there is just enough to get going.
If you want to own a trinket you could drop $60 on a HiFive1 board with a genuine RISC-V processor but you can simulate RISC-V in QEMU today and boot Linux on it. CPU simulation performance is acceptable enough to get work done and QEMU also supports MIPS CPU simulation.
While RISC-V may run Linux it does not have the capability to move into the performance category. David Patterson, one of the original co-designers of RISC (And RAID) co-authored an interesting paper spelling out an ambition to become the ubiquitous processing core anywhere computing is done. A lofty goal but like Linux it will take billions of dollars in investment from a broad partner ecosystem to move towards performance and take on the established providers there.
The ARM server CPU companies have faded because moving from low power to high performance is a new set of brutal challenges. One of those challenges would be in meeting Intel and AMD on ground they know well and outspending them when it was required. When it mattered Linux had friends with deep pockets, ARM server processor providers do not.
Unlike RISC-V MIPS descended from high performance into low power and minimal cost through a number of marketplace defeats at the hands of others. MIPS was considered to be so strategic in the 90s that it was the second target platform for Windows NT 1.0, but it is now more commonly found in embedded controllers.
With poor leadership and a hostile market MIPS has had a rough two decades but continues to be used for embedded applications and appliances. Facing a surge in RISC-V interest team MIPS had no choice but to open up their intellectual property for fear they would be the first casualty of RISC-V. This was an move showing intelligence that has been lacking from previous MIPS leadership for years so there might be room for MIPS Open in the minimal cost processor segment yet.
The question that matters is if it's possible for minimal cost processors to jump categories and take on the performance CPU providers? Yes it is possible. But they're going to need a lot of friends who have a lot of money and those friends will really have to want them to succeed.
Same as it was back in the 80s when the original RISC processor designs came out of the Berkeley CS labs and dominated the UNIX business for years after.